In short, the working principle of a field-effect transistor (FET) is that "the current ID flowing between the drain and source through the channel is controlled by the reverse-biased gate voltage formed by the pn junction between the gate and the channel." More precisely, the width of the ID flow path, i.e., the channel cross-sectional area, is controlled by the change in depletion layer expansion caused by the change in the reverse bias of the pn junction. In the non-saturation region where VGS=0, the expansion of the transition layer is not very large. According to the electric field VDS applied between the drain and source, some electrons in the source region are pulled away by the drain, i.e., current ID flows from the drain to the source. The transition layer extending from the gate to the drain blocks part of the channel, causing ID to saturate. This state is called pinch-off. This means that the transition layer blocks part of the channel, but the current is not cut off.
In the transition layer, because there is no free movement of electrons and holes, it has almost insulating properties under ideal conditions, and current usually flows very slowly. However, at this point, the electric field between the drain and source is actually near the bottom of the drain and gate where the two transition layers are in contact. High-speed electrons drawn by the drift electric field pass through the transition layer. Because the strength of the drift electric field remains almost constant, ID saturation occurs. Secondly, VGS changes in the negative direction, making VGS = VGS(off), at which point the transition layer roughly covers the entire region. Furthermore, most of the electric field of VDS is applied to the transition layer, pulling electrons towards the drift direction, leaving only a very short portion near the source, further preventing current flow.
MOS Field-Effect Transistor Power Switch Circuit
MOS field-effect transistors are also known as metal-oxide-semiconductor field-effect transistors (MOSFETs). They generally come in two types: depletion-mode and enhancement-mode. Enhancement-mode MOSFETs can be further divided into NPN and PNP types. NPN type is usually called N-channel, and PNP type is also called P-channel. For an N-channel field-effect transistor (FET), the source and drain are connected to an N-type semiconductor, and similarly, for a P-channel FET, the source and drain are connected to a P-type semiconductor. The output current of an FET is controlled by the input voltage (or electric field), and can be considered as minimal or nonexistent. This results in a high input impedance, which is why it's called a field-effect transistor (FET).
When a forward voltage is applied to a diode (P-terminal to positive, N-terminal to negative), the diode conducts, and current flows through its PN junction. This is because when a positive voltage is applied to the P-type semiconductor, negative electrons in the N-type semiconductor are attracted to the positively voltaged P-type semiconductor, while positive electrons in the P-type semiconductor move towards the N-type semiconductor, thus creating a conducting current. Similarly, when a reverse voltage is applied to the diode (P-terminal connected to the negative terminal and N-terminal to the positive terminal), a negative voltage is applied to the P-type semiconductor. Positive electrons are concentrated at the P-type semiconductor, while negative electrons are concentrated at the N-type semiconductor. Since the electrons do not move, no current flows through the PN junction, and the diode is cut off. When there is no voltage at the gate, as analyzed earlier, no current flows between the source and drain, and the MOSFET is in the off state (Figure 7a). When a positive voltage is applied to the gate of an N-channel MOS MOSFET, due to the electric field, negative electrons from the source and drain of the N-type semiconductor are attracted to the gate. However, due to the obstruction of the oxide film, the electrons accumulate in the P-type semiconductor between the two N-channels (see Figure 7b), thus forming a current and making the source and drain conductive. It can be imagined that the two N-type semiconductors are connected by a channel, and the establishment of the gate voltage is equivalent to building a bridge between them. The size of this bridge is determined by the gate voltage.
C-MOS Field-Effect Transistor (Enhancement-Mode MOS Field-Effect Transistor)
This circuit combines an enhancement-mode P-channel MOS field-effect transistor (EMT) and an enhancement-mode N-channel MOS field-effect transistor (N-channel MOS field-effect transistor). When the input is low, the P-channel MOS field-effect transistor is turned on, and its output is connected to the positive terminal of the power supply. When the input is high, the N-channel MOS field-effect transistor is turned on, and its output is connected to ground. In this circuit, the P-channel and N-channel MOS field-effect transistors always operate in opposite states, with their input and output phases reversed. This operation allows for a larger current output. Simultaneously, due to leakage current, the MOS field-effect transistor is turned off before the gate voltage reaches 0V, typically when the gate voltage is less than 1 to 2V. The turn-off voltage varies slightly depending on the specific MOS field-effect transistor. This design prevents a short circuit caused by both transistors conducting simultaneously.
